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ZDNet Dictionary Definition
- FPGA
- Field Programmable Gate Array A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of...
- Full FPGA Definition >>
ZDNet Resources
- BEE3: Revitalizing Computer Architecture Research
- In recent years, advances in computer architecture have slowed dramatically with most simulation results demonstrating only incremental architectural innovation. This is further exacerbated by increased processor and system complexity spurred by a seemingly unlimited number of transistors at computer architect's disposal. Computer architects produce a myopic view of their systems...
- Tags: Software, FPGA, Computer, Productivity, Tools & Techniques, Management
- White papers 2009-05-06
- Power-Aware FPGA Design
- Power consumption requirements in new, autonomous, multimedia-savvy consumer products that can store, transmit, and receive information have catapulted system architects and board and chip designers into a new realm. Even when designers attempted to reduce system power consumption, their approaches were not comprehensive and focused enough to achieve optimal results....
- Tags: Technique, Actel, Aware, Board, Power Consumption, FPGA, Productivity, Corporate Governance, Business Operations, Corporate Law
- White papers 2009-02-01
- Exploiting Reconfigurable Hardware for Network Security
- One type of network security strategy is using an Intrusion Detection System IDS. They are implementing IDS in FPGA-based Field Programmable Gate Array reconfigurable hardware. This is to achieve higher speed and more efficient performance of network security, as networks develop very fast with consequently more demanding constraints. This paper...
- Tags: Network, Intrusion Detection System, Hardware, FPGA, University Of Oslo, Intrusion Detection, Network Security, Networking, Security
- White papers 2009-01-01
- High-Volume Nano FPGAs: Going Where No FPGA Has Gone Before
- Electronic devices have found their way into every aspect of daily life. This popularity is driving demand for more portability and higher integration. While demand is increasing, design teams are challenged with meeting shorter time-to-market demands in their current design processes. Traditional ASIC and ASSP design technologies are limited by...
- Tags: Team, Actel, FPGA, Team Management, Management
- White papers 2008-11-01
- Self-healing computers for NASA spacecraft
- As you can guess, hardwired computer systems are much faster than general-purpose ones because they are designed to do a single task. But when they fail, they need to be totally reconfigured. This can be just a costly problem in a lab on Earth, but it can be vital in...
- Tags: NASA, Patent, Unit, Hardware, FPGA, Computer, UA, UA Engineer, Roland Piquepaille
- Blog posts 2008-04-25
- Performance Analysis With High-Level Languages for High-Performance Reconfigurable Computing
- High-Level Languages HLLs for FPGAs (Field-Programmable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher-level syntax, semantics, and abstractions, typically enabling faster development times than with traditional Hardware Description Languages HDLs. However, this abstraction is typically accompanied by some loss of performance as...
- Tags: Performance, High-performance, Computing, FPGA, Performance Management, Human Resources, Workforce Management
- White papers 2008-03-18
- Black Hat, Day 1: Cracking GSM and skimming ATMs
- Day 1 at Black Hat brought some outstanding talks. The day started off with David Hulton (aka h1kari, also the producer of ToorCon) and Steve from THC, who presented on "Cracking GSM". It was quite interesting due to the tie-in that David has with Pico...
- Tags: Black Hat, FPGA, GSM, Phishing, ATM, Cyberthreats, Network Technology, Spam, Networking, Security, Spam And Phishing, Nate McFeters
- Blog posts 2008-02-20
- FPGA Design of Boyer-Moore Algorithm for Spyware Detection
- Spyware is becoming increasingly destructive and sophisticated in threatening the privacy and efficient computing of the internet users. This new paradigm has opened the path for vendors to stop or substantially reduce the spreading of this uninvited program. Software and hardware approach has been identified to be implemented in order...
- Tags: Algorithm, Hardware, FPGA, University Of Malaya, Spyware, Spyware, Adware & Malware, Cyberthreats, Viruses And Worms, Security
- White papers 2008-02-11
- Light-Trail Testbed for Metro Optical Networks
- Telecommunication networks have rapidly added staggering amounts of capacity to their long haul networks at low costs per bit using DWDM technologies. Concurrently, there has been a wave of new access technologies that are driving customers to demand high-speed, robust and customized data services. These dynamics have led to what...
- Tags: Iowa State University, Optical Network, Network, FPGA, Streaming Media, Web Site Development, Web Technology, Optical Networking, Fiber Optics, Digital Media, Networking, Internet, Telecommunications, Consumer Electronics, Personal Technology
- White papers 2008-01-01
- High Performance Computing by Context Switching Reconfigurable Logic
- Reconfigurable computing has grown to become an important and large field of research. It is based on using Field Programmable Gate Arrays FPGAs. In this paper, this technology is introduced and it is shown how it can be applied for high speed computing. There is a large range of real-world...
- Tags: High-performance Computing, High-performance, Computing, FPGA, University Of Oslo
- White papers 2008-01-01
- Compiling PCRE to FPGA for Accelerating SNORT IDS
- Deep Payload Inspection systems like SNORT and BRO utilize regular expression for their rules due to their high expressibility and compactness. The SNORT IDS system uses the PCRE Engine for regular expression matching on the payload. The software based PCRE Engine utilizes an NFA engine based on certain opcodes which...
- Tags: Snort, Regular Expression, FPGA
- White papers 2007-12-04
- Driving with poor vision becomes possible
- Spanish researchers have developed and successfully tested a computer simulator allowing visually impaired to drive. This system is called SERBA (short for 'Sistema Electro-óptico Reconfigurable de ayuda para Baja Visión'), which means 'Reconfigurable Electric-Optical System for Low Vision' in English. This innovative system is based on a reconfigurable device known...
- Tags: Patient, Vision, FPGA, Strategy, Management, Roland Piquepaille
- Blog posts 2007-10-17
- A Flexible Solution for Industrial Ethernet
- This white paper describes the use of FPGA devices to deliver a multi-standard Industrial Ethernet capability from a single printed circuit board implementation. The benefits of FPGA implementation are described and an overview of the FPGA development flow, tools and technology used to create a universal but easy to maintain...
- Tags: Ethernet, Altera Corp., Circuit Board, FPGA
- White papers 2007-10-01
- Accelerating High-Performance Computing With FPGAs
- The coprocessors from Xtreme Data and SRC represent the next step in HPC. The competitive advantages that application speed gives to users ensures that the demand for speed will continue to outpace what processors alone can achieve. Coprocessors based on Stratix III FPGAs provide the high-speed, low-latency interfaces that hardware...
- Tags: Altera Corp., High-performance Computing, High-performance, FPGA, Business Structures, Leadership, Productivity, Finance, Management
- White papers 2007-10-01
- A High Performance FPGA-Based Accelerator for BLAS Library Implementation
- This paper describes the implementation and the performance analysis of a hardware accelerator for the BLAS library matrix multiplication operation. This accelerator is based on a dual-FPGA board and on an implementation BLAS software library making use of the FPGA-based hardware. In order to evaluate the performance of such a...
- Tags: Accelerator, High-performance, Hardware, FPGA, Corporate Governance, Business Operations, Corporate Law
- White papers 2007-06-29
- Implementation of High Speed Streaming Video Data Transfer Application on FPGA
- High speed streaming video data transfer operations are evolving with the onset of an era of high-end multimedia applications in compact digital devices. These data transfer applications become more crucial in high resolution video imaging. This paper talks about System-on-Chip architecture for storing and transferring high speed data from image...
- Tags: Streaming Video, Video, FPGA, eInfochips, Web Site Development, Web Technology, Digital Video, Corporate Communications, Internet, Personal Technology, Marketing
- White papers 2007-06-01
- A Programmable Parallel Processor Architecture in FPGAs for Image Processing Sensors
- In industrial image processing real-time requirements are very important issues. In future robot assistants, for example, object detection below 10 ms will be indispensable. This can only be met by over-sized DSP- /microcontroller working in a pixel serial manner with a high system clock. This paper presents a parallel processor...
- Tags: Sensor, Image Processing, FPGA, Robots, Processors, Emerging Technologies, Semiconductors, Hardware, Components
- White papers 2007-06-01
- FIR HDL Writer 0.9.0 (Windows)
- FIR HDL Writer is an EDA tool which generates FIR filters in clear text Verilog which may be synthesized to FPGA's or ASIC's. Design options include multiple channels, coefficient sets, interpolation, decimation, and resource utilization specifications. The designs are fully synchronous and registered to provide maximum clock frequencies. Clock rates...
- Tags: FPGA, Optunis, FIR HDL Writer, ASICs, Microsoft Windows, Productivity, Semiconductors, Hardware, Operating Systems, Software
- Software downloads 2007-05-31
- FIR HDL Writer 0.9 (Mac)
- FIR HDL Writer is an EDA tool which generates FIR filters in clear text Verilog which may be synthesized to FPGA's or ASIC's. Design options include multiple channels, coefficient sets, interpolation, decimation, and resource utilization specifications. The designs are fully synchronous and registered to provide maximum clock frequencies. Clock...
- Tags: Apple Macintosh, FPGA, Optunis, FIR HDL Writer, ASICs, Semiconductors, Hardware
- Software downloads 2007-05-30
- Binary LNS-Based Naive Bayes Inference Engine for Spam Control: Noise Analysis and FPGA Implementation
- A hardware architecture for naive Bayes inference engine in the context of e-mail content classification for spam control is proposed. The inference engine utilizes the Logarithmic Number System LNS to simplify naive Bayes computations. For high throughput LNS recoding, a non-iterative binary LNS recoding hardware architecture that uses look-up table...
- Tags: FPGA, Analysis, University Of Victoria, Inference Engine
- White papers 2007-05-14
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